The goal of this project is to develop some projects on the Super Nes from Nintendo.

Technical Details

The snes is based on a 65816 MPU variant designed by Ricoh, the 5A22. The original 65816 was design by Western Design Center

WDC 65816/65802

WDC 65816/65802 Features

(From en.wikipedia.org)

Fully static CMOS design for low power consumption (300 µA at 1 MHz) and increased noise immunity.
Wide operating voltage range: 1.8 V ± 5%, 2.5 V ± 5%, 3.0 V ± 5%, 3.3 V ± 10%, 5.0 V ± 5% for use with varying voltage peripherals.
Wide operating frequency range.
Emulation mode allows complete software compatibility with the 65C02, excepting undocumented opcodes.
24-bit memory addressing provides access to 16 MB of memory space.
16-bit ALU, accumulator, stack pointer and index registers.
Valid Data Address (VDA) and Valid Program Address (VPA) outputs for dual cache and cycle steal DMA implementation.
Vector Pull (VPB) output to indicate when an interrupt vector is being addressed.
Abort (ABORTB) input and associated vector supports processor repairs of bus error conditions, such as memory access violations.
Separate program and data bank registers allow program segmentation or 16 MB linear addressing (data only).
Direct register and stack relative addressing provides capability for reentrant, recursive and re-locatable programming.
24 addressing modes—13 original 6502 modes with 92 instructions using 256 op codes, including most new opcodes implemented in the 65C02.
Wait-for-Interrupt (WAI) and Stop-the-Clock (STP) instructions further reduce power consumption, decrease interrupt latency and allows synchronization with external events.
Co-Processor (COP) instruction with associated vector supports co-processor configurations, e.g., floating point processors
Reserved "escape" (WDM) instruction for future two-byte opcodes and a link to future designs (e.g., the yet-to-be-released Terbium 32-bit MPU). WDM are the initials of founder William D. Mensch.
Block-move instructions, allowing rapid copying of data structures from one area of RAM to another with minimal code.

Interessting applications

Apple IIGS
C-One Reconfigurable Computer (standard CPU/RAM card)

A number of SNES games contained the Nintendo SA-1, an upgraded version of the W65C816S.

SuperCPU An upgrade for the Commodore 64.[1]

Ricoh 5A22

Ricoh 5A22 Features

(From en.wikipedia.org )

In addition to the 65C816 CPU core, the 5A22 contains support hardware, including:

Controller port interface circuits, including both Serial and Parallel access to controller data
An 8-bit parallel I/O port, which was mostly unused in the SNES
Circuitry for generating Non-maskable interrupt interrupts on Vertical blanking interval
Circuitry for generating IRQ interrupts on calculated screen positions
A DMA unit, supporting two primary modes:
- General DMA, for block transfers at a rate of 2.68MB/s
- H-blank DMA, for transferring small data sets at the end of each scanline outside of the active display period
Multiplication and division registers
Two separate address busses driving the 8-bit data bus : a 24-bit "Bus A" for general access, and an 8-bit "Bus B" mainly for APU and PPU registers

Documentation

Here's a list of some interessting documents about these 2 MPU

Snes Programming

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